Wrocław, Warszawa

About the position

• Participating in the development of advanced signal and data processing algorithms working on FPGA devices

• Participating in development of HDL-based designs for the communication sector, building systems from IP blocks and own RTL code

• Collaboration with software developers and DSP specialists to implement and test signal processing algorithms in simulation and hardware

• Collaboration with system engineers on creating and refining requirements for FPGA based designs

• Assisting in development and running of tests and simulations

• Preparation of technical documentation

• Analyzing state-of-the-art in the field of hardware description languages and available FPGA hardware

Requirements

• Good understanding of FPGA development cycle (Xilinx specific preferred)

• Strong grasp of a chosen HDL (VHDL, VERILOG or SYSTEM VERILOG )

• Good understanding of clock-domain-crossing issues and available solutions

• Knowledge of design techniques for energy efficient and low-power systems

• Good knowledge of AXI interfaces

• Experience with Vivado or Modelsim simulation

• Familiarity with the most common interfaces, including I2C, SPI, CAN, UART, etc.

• Ability to analyze and resolve complex technical problems efficiently and independently

• Knowledge of wireless communication technology (e.g. analog & digital modulations, coding, synchronization, OFDM, MIMO, channel capacity, multiple access schemes etc.)

• Familiarity with software-defined radios

• Ability to work in multidisciplinary teams working from different remote locations

• Don't meet them all? Not a problem. We encourage that you send us your application even if you do not meet all the above criteria

• Optional: Experience with Python or Matlab

• Optional: Experience with verification and testing methodologies and tools

• Optional: Familiarity with analog radio frequency engineering concepts (e.g. filters, amplifiers, signal up/down conversion, compression, etc.)

• Optional: Experience with a “high-level” FPGA programming (e.g. Vitis HLS)

• Optional: Familiarity with FPGA SoCs

• Optional: Familiarity with network interfaces and stacks

• Optional: Familiarity with high-speed interfaces (serdes)

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We offer

• Private medical care, life insurance, sports card

• Hybrid work model with doubled work-from-home days

• World-class, innovative space projects

• Stable employment based on a full-time contract

• Real impact on company growth and new technologies

• Supportive, multidisciplinary team of experts

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Benefits

• Sharing the costs of sports activities

• Private medical care

• Life insurance

• Flexible working time

• No dress code

• Coffee / tea

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Additional Information
Interested candidates should send a cover letter and CV to recruitment@thoriumspace.com, including the position title from the job posting in the subject line.

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Personal data information
Please include the following in your CV: I consent to the processing of my personal data for the purposes necessary to carry out the recruitment process (in accordance with the Personal Data Protection Act of 10 May 2018 (Journal of Laws of 2018, item 1000) and Regulation (EU) 2016/679 of the European Parliament and of the Council of 27 April 2016 on the protection of natural persons with regard to the processing of personal data and on the free movement of such data, and repealing Directive 95/46/EC (GDPR).